Freescale Semiconductor /MK82F25615 /LMEM /PSCCR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as PSCCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)ENCACHE 0 (0)ENWRBUF 0 (0)INVW0 0 (0)PUSHW0 0 (0)INVW1 0 (0)PUSHW1 0 (0)GO

INVW1=0, ENWRBUF=0, PUSHW1=0, GO=0, PUSHW0=0, INVW0=0, ENCACHE=0

Description

Cache control register

Fields

ENCACHE

Cache enable

0 (0): Cache disabled

1 (1): Cache enabled

ENWRBUF

Enable Write Buffer

0 (0): Write buffer disabled

1 (1): Write buffer enabled

INVW0

Invalidate Way 0

0 (0): No operation

1 (1): When setting the GO bit, invalidate all lines in way 0.

PUSHW0

Push Way 0

0 (0): No operation

1 (1): When setting the GO bit, push all modified lines in way 0

INVW1

Invalidate Way 1

0 (0): No operation

1 (1): When setting the GO bit, invalidate all lines in way 1

PUSHW1

Push Way 1

0 (0): No operation

1 (1): When setting the GO bit, push all modified lines in way 1

GO

Initiate Cache Command

0 (0): Write: no effect. Read: no cache command active.

1 (1): Write: initiate command indicated by bits 27-24. Read: cache command active.

Links

() ()